In semiconductor technologies, especially ultra-large integrated circuits, critical dimensions of the integrated circuits continuously decrease. A length of a channel in a metal-oxidation-semiconductor transistor (MOSFET) also continuously decreases. As the length of the channel in the MOSFET continuously decreases, a distance between a source and a drain also continuously decreases. Correspondingly, a gate in the MOSFET has a weaker controlling ability on channel currents, and it is more difficult for a gate voltage to pinch off the channel. A subthreshold leakage effect, i.e., a short-channel effect, occurs more easily.
To better adapt to the continuously-decreased critical dimensions, the semiconductor technology has gradually moved from planar MOSFETs to more effective non-planar three-dimensional transistors, such as fin field effect transistors (FinFETs). In a FinFET, a gate structure can control an ultra-thin part (a fin) at least from two sides of the fin, to provide a much stronger controlling ability on channels and to effectively suppress the short-channel effect. Moreover, in comparison with other devices, a FinFET is more compatible with present fabrication processes for integrated circuits. To continuously improve a driving ability of a current and suppress the short channel effect, technical nodes continuously decrease and conventional FinFETs cannot meet requirements of the continuously-decreased technical nodes. Gate-all-around (GAA) FinFETs are used to achieve a higher integration level and to further suppress the short channel effect.
A FinFET device usually includes core devices and I/O devices, having different semiconductor structures. The core devices usually include GAA structures. When forming GAA structures for the core devices, to improve performances of the I/O devices, fins in the I/O devices and fins in the core devices are simultaneously treated by an in-situ steam generation (ISSG)-decoupled plasma nitrogen (DPN) process, to form dummy gate oxidation layers. These high-temperature thermal oxygen treatments may induce a diffusion/migration of a material of sacrificial layers in the fin of the core devices. The formed FinFET may have a poor performance.